1. Field of the Invention
The present invention relates to a method for erasing and changing data, and more particularly, to a method for erasing and changing data of a floating gate flash memory.
2. Description of the Prior Art
Flash memories generally are divided into groups of floating gates and split gates. The floating gate flash memories are utilized in portable electronic devices, a computer basic input/output system (BIOS), and other electronic devices because of the small size and the good programming/erasing endurance of the floating gates. In conventional floating gate flash memories, memory cells in a same p well are set up as a sector, and an insulation layer is further disposed around the p well so as to insulate the memory cells of one sector from memory cells of other sectors. The disposal of the insulation layers reduces the efficiency of the flash memories. That is, the more insulation layers are disposed, the less of the flash memories can be used. Thus, the p wells of the floating gate flash memories are designed of wider area for reducing the disposal of the insulation layers and increasing the efficiency of the flash memories.
In a same p well, all memory cells are electrically related. Thus, if the memory cells of the same p well are divided into different sectors, when one sector of the same p well erases, other sectors of the same p well are disturbed by the action of the erasing. When the disturbance accumulates over a certain level, data “0” stored in the disturbed memory cell becomes “1” (data “1” stored in the disturbed memory cell does not become “0”). Therefore, conventional floating gate flash memories have to be designed with the memory cells in a same p well to be one sector. When any data of any memory cells in the p well changes, all of the memory cells in the p well (sector) have to be erased (to be “1”), and then written again for insurance of the data correction. Such way is very time-consuming and causes inconvenience.
For example, the size of the sector of the floating gate flash memory is designed to store 64 K bytes in a p well. That is, 256 word lines are disposed, each word line corresponds to 256'8 bit lines, and the memory cells are interwoven by the word lines and bit lines and thus the amount of the memory cells is 256×256 (64 K bytes). Every time when one memory cell is erased or programmed, all of the 64-K-bytes memory cells (all the memory cells corresponding to the 256 word lines) have to be erased and then reprogrammed, which is not convenient.